Mp6922 6k596c
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MP6922 Dual Fast Turn-off Intelligent Controller The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP6922 is a dual fast turn-off intelligent controller to drive two N-CH power MOSFETs in LLC resonant converters for synchronous rectification.
•
The IC regulates the forward voltage drop of the power switch to about 70mV and turns it off before the voltage goes negative.
• • • • •
•
MP6922 has a light-load function to latch-off the gate driver at light load condition, during which only about 600μA quiescent current is consumed.
•
The fast turn-off speed of MP6922 makes both CCM and DCM driving available. An internal Reverse Current Protection (R) function ensures safe operation of the MOSFETs in high frequency CCM condition.
•
Works with both Standard and Logic Level FETs Compatible with Energy Star, 0.5W Standby Requirements VDD Range From 8V to 24V Fast Turn-off Total Delay of 20ns Reverse Current Protection Function Max 300kHz Switching Frequency <600uA Quiescent Current at Light Load Mode s CCM, CrCM and DCM Operation Mode Available in SOIC8E, SOIC8 or SOIC14 package
APPLICATIONS • • •
MP6922 requires a minimum number of readily available standard external components and is available in SOIC8E, SOIC8 or SOIC14 package.
AC-DC Adapter LCD & PDP TV Telecom SMPS
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are ed Trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION Q1
Q1
Cs
Cs
S1
Ls
Cin
T Q2
S1
Ls
Cin
T Q2
Cout
VOUT
Lm
S2
Cout
GND R2
S2 GND
MP 6922 1 2
VG1
8
EN
VDD
7
3
VD2
VD1
4
VS2
VS1 PGND
1 2 EN Signal 3
6
C1
5
R1
4 5 6 7
C1
MP6922 Rev. 1.23 9/19/2012
R4
MP6922
R1
VG2
EN Signal
SOIC8E
R3
VOUT
Lm
PGND PGND VG2
VG1
EN
VDD
LL
R
NC
NC
VD2
VD1
VS2
VS1
14 13 12 11
C2
10 9 8
SOIC14
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1
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
ORDERING INFORMATION Part Number MP6922DN* MP6922DS** MP6922DSE***
Package SOIC8E SOIC14 SOIC8
Top Marking MP6922 MP6922 MP6922
*For Tape & Reel, add suffix –Z (e.g. MP6922DN–Z); For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6922DN–LF–Z) **For Tape & Reel, add suffix –Z (e.g. MP6922DS–Z); For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6922DS–LF–Z) ***For Tape & Reel, add suffix –Z (e.g. MP6922DSE–Z); For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6922DSE–LF–Z)
PACKAGE REFERENCE TOP VIEW
TOP VIEW VG2
PGND
EN
VD2
8
1
2
3
MP6922 SOIC-8
4
7
6
5
SOIC8
VG2
1
EN
2
TOP VIEW 8
VG1
7
VDD
VG1
MP6922
VDD VD2
3
VS2
4
SOIC-8E
6
VD1
5
VS1
VD1
VSS
PGND
1
14 PGND
VG2
2
13 VG1
EN
3
LL
4
NC
5
VD2
6
9
VD1
VS2
7
8
VS1
MP6922
12 VDD 11 R
SOIC-14
10 NC
S1 D1
PGND EXPOSED PAD ( SOIC8 N ONLY)
SOIC8E
SOIC14
ABSOLUTE MAXIMUM RATINGS (1)
Recommended Operation Conditions
VDD to VS1,VS2, VSS ........................-0.3V to +26V PGND to VS1,VS2, VSS ...................-0.3V to +0.3V VG1 to VS1, VSS ................................. -0.3V to VDD VG2 to VS2, VSS ................................. -0.3V to VDD VD1 to VS1, VSS .............................-0.7V to +180V VD2 to VS2, VSS .............................-0.7V to +180V LL, EN to VS1,VS2, VSS ..................-0.3V to +6.5V Maximum Operating Frequency............ 300 kHz (2) Continuous Power Dissipation .. (TA = +25°C) SOIC8E...................................................... 2.5W SOIC14 ...................................................... 1.5W SOIC8 ........................................................ 1.4W Junction Temperature ...............................150°C Lead Temperature (Solder).......................260°C Storage Temperature .............. -55°C to +150°C
VDD to VS1,VS2, VSS...............................8V to 24V Operating Junction Temp. (TJ).... -40°C to +125°C
MP6922 Rev. 1.23 9/19/2012
Thermal Resistance
(4)
θJA
(3)
θJC
SOIC8 .....................................90 ...... 45 ... °C/W SOIC8E ...................................50 ...... 10 ... °C/W SOIC14 ...................................86 ...... 38 ... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) TA=+25℃. The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Without heatsink.
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2
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
ELECTRICAL CHARACTERISTICS VDD = 12V, TA= +25°C, unless otherwise noted. Parameter VDD Voltage Range
Symbol Conditions
VDD UVLO Threshold Quiescent Current
Iq
Shutdown Current Light-load Mode Current Thermal shutdown Thermal Shutdown hysteresis
Rising Hysteresis Rising Hysteresis
Enable Shutdown Threshold Enable UVLO Threshold Internal Pull-up Current on EN CONTROL CIRCUITRY SECTION VS1,2 –VD1,2 forward voltage Vfwd TDon Turn-on delay TDon Input bias current on VD1,2 pin Minimum on-time TMIN Minimum off-time TOFF Light-load-enter delay TLL-Delay Light-load-enter pulse width TLL Light-load turn on pulse width TLL-H hysteresis Light-load-enter off period TLL-OFF width Light-load mode exit pulse VLL-DS width threshold (VD1,2-VS1,2) Light-load mode enter pulse VLL-GS width threshold (VG1,2-VS1,2) Reverse Current Protection VR threshold Reverse Current Protection TR latch time GATE DRIVER SECTION VG1,2 (Low) VG1,2 (High) Turn off threshold (VS1,2-VD1,2) Turn-off propagation delay Turn-off total delay Pull down impedance Pull down current
MP6922 Rev. 1.23 9/19/2012
Rising Hysteresis VD1-VS1=-0.5V, VD2-VS2=-0.5V VDD=20V, EN=0V
TDoff TDoff
Min 8 5.0 0.5
1.1 2.5
55 CLOAD = 5nF CLOAD = 10nF VD1,2 = 180V CLOAD = 5nF
Typ 6.0 1
Max 24 7.0 1.5
Units V V V
4
6
mA
600 600
µA µA o C o C V V V V µA
150 30 1.5 0.2 3 0.2 10 70 150 250
1.9 0.4 3.5 15 85
1
mV ns ns µA µs µs µs µs
RLL=100kΩ RLL=100kΩ
1 1.6 120 2.2
RLL=100kΩ
0.2
µs
RLL=100kΩ
50
µs
-250
mV
1.0
V
3
V
100
µs
-400
ILOAD=1mA VDD >16V VDD <16V VD1,2=VSS VD1,2 =VSS, CLOAD=5nF, RGATE=0Ω VD1,2 =VSS, CLOAD=10nF, RGATE=0Ω 3V
<10V
0.05 14 VDD-2.2 0 15
150
0.1
V V mV ns
35
ns
45
ns
1 3
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2
Ω A
3
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
PIN FUNCTIONS Pin # Pin # Pin # Name Description (SOIC8) (SOIC8E) (SOIC14) 1 1 2 VG2 FET 2 gate driver output Enable Pin. When EN pin voltage is larger than EN Shutdown threshold, 3 2 3 EN the internal logic of the IC is start but the gate driver will be latched until the EN pin voltage has exceed the EN UVLO threshold 4 3 6 VD2 FET 2 drain voltage sense 4 7 VS2 Source pin used as reference for VD2 5 8 VS1 Source pin used as reference for VD1 6 6 9 VD1 FET 1 drain voltage sense 7 7 12 VDD Supply Voltage 8 8 13 VG1 FET 1 gate driver output EXPOSE 2 1,14 PGND Power Ground, return for power switch D PAD 5,10 NC No Connection 4 LL Light load timing setting. Connect a resistor to set the light load timing 11 R Reverse Protection function, internal 5V reference. 5 VSS Common source pin used as reference for both channels
MP6922 Rev. 1.23 9/19/2012
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4
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS
6.15
260
6.1
255
6.05
VDD UVLO RISING( V)
BREAKDOWN VOLTAGE ( V)
265
250 245 240 235 230
6 5.95 5.9 5.85 5.8 5.75 5.7 -50 -30 -10 10 30 50 70 90110130150
225 -50 -30 -10 10 30 50 70 90 110130150
450
Shutdown Current (VDD=20V) vs. Temperature
71
VF W D ( mV)
430
400
4.4 4.2 4 3.8 3.6 3.4 3.2 3 -50 -30 -10 10 30 50 70 90 110130150
70 69.5 69
380
68.5
MP6922 Rev. 1.23 9/19/2012
4.6
70.5
390
370 -50 -30 -10 10 30 50 70 90110 130150
4.8
72 71.5
410
Quiescent Current vs. Temperature
Vfwd vs. Temperature
440
420
VDD UVLO Rising vs. Temperature QUIESCENT CURRENT (mA)
VDD = 12V, unless otherwise noted. VD1,2 Breakdown Voltage vs. Temperature
68 -50 -30 -10 10 30 50 70 90110130150
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5
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued) VDD = 12V, unless otherwise noted. Operation in 180W LLC Converter VIN=220Vac, VOUT=12V, IOUT=15A
Operation in 180W LLC Converter
Operation in 180W LLC Converter
VIN=240Vac, VOUT=12V, IOUT=15A
VIN=260Vac, VOUT=12V, IOUT=15A
VDS1 20V/div.
VDS1 20V/div.
VDS1 20V/div.
VGS1 5V/div.
VGS1 5V/div.
VGS1 5V/div.
VDS2 20V/div.
VDS2 20V/div.
VDS2 20V/div.
VGS2 5V/div.
VGS2 5V/div.
VGS2 5V/div.
MP6922 Rev. 1.23 9/19/2012
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6
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
BLOCK DIAGRAM R
LL
VDD PGND
EN
VD1
VG1
VS1
VS2 VG2
VD2
Figure 1—Functional Block Diagram
OPERATION The MP6922 s operation in DCM, CCM and CrCM condition. Operating in either a DCM or CrCM condition, the control circuitry controls the gate in forward mode and will turn the gate off when the MOSFET current is fairly low. In CCM operation, the control circuitry turns off the gate when very fast transients occur. Blanking The control circuitry contains blanking function. When it pulls the MOSFET on/off, it makes sure that the on/off state at least lasts for some time. The turn on blanking time is ~1us, which determines the minimum on-time. During the turn on blanking period, the turn off threshold is not totally blanked, but changed to ~+50mV (instead of 0mV). This assures that the part can always be turned off even during the turn on blanking period. (Albeit slower, so it is not recommended to set the synchronous period less than 1μs at
MP6922 Rev. 1.23 9/19/2012
CCM condition in LLC converter, otherwise shoot through may occur) VD Clamp Because VD1,2 can go as high as 180V, a HighVoltage JFET is used at the input. To avoid excessive currents when Vg goes below -0.7V, a small resistor is recommended between VD1,2 pin and the drain of the external MOSFET. Under-Voltage Lockout (UVLO) When VDD is below UVLO threshold, the part falls into sleep mode and Vg is pulled down by a 10kΩ resistor. Enable pin If EN is pulled low, the part is in sleep mode. Thermal shutdown If the junction temperature of the IC exceeds 150oC, Vg will be pulled low and the part
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7
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER stops switching. The part will return to normal operation after the junction temperature has dropped to 120oC. Turn-on Phase When the switch current flows through the body diode of the MOSFET, there will be a negative VDS (VD-VSS) across it (<-500mV), the VDS is much lower than the turn on threshold of the control circuitry (-70mV), which then turns on the MOSFET after 200ns turn-on delay (defined in Fig.2). As soon as the turn on threshold (-70mV) is triggered, a blanking time (Minimum on-time: ~1us) will be added during which the turn off threshold will be changed from 0mV to +50mV. This blanking time can help to avoid error trigger on turn off threshold caused by the turn on ringing of the synchronous power switch.
low after about 20ns turn off delay (defined in Fig.4) by the control circuitry. Similar with turn-on phase, a 1.6us blanking time is added after the switch is turned off, during which the MOSFET is never turned on to avoid error trigger. Fig.3 show the MP6922 operation at heavy load condition. Due to the high current, the driver voltage will be saturated at first. After VDS goes to above -70mV, driver voltage decreases to adjust the VDS to typical -70mV. Fig.4 show the MP6922 operation at light load condition. Due to the low current, the driver voltage never saturates but begins to decrease as soon as the synchronous power switch is turned on and adjust the VDS. Vds 0 mV - 70mV
0mV -70mV
VDS tDon VGATE
tDoff
Isd
2V
Vgs
Figure 2—Turn on and Turn off delay Conducting Phase When the MOSFET is turned on, VDS (-ISD X rDS(ON)) becomes to rise according to the drop of the switch current (ISD) , as soon as VDS rises above the turn on threshold (-70mV), the control circuitry stops pulling up the gate driver and the driver voltage of the MOSFET dropped, which makes the on resistance rDS(ON) of the MOSFET becomes larger. By doing that, VDS (-ISD x rDS(ON)) is adjusted to be around -70mV even when the switch current ISD is fairly small, this function can make the turn off threshold (0mV) of the internal driver never triggered until the current through the MOSFET has dropped to near zero. Turn-off Phase When VDS rises to trigger the turn off threshold (0mV), the driver voltage of the switch is pulled to
MP6922 Rev. 1.23 9/19/2012
Figure 3—Synchronous Rectification Operation at heavy load Vds 0 mV - 70mV
Isd
Vgs
Figure 4—Synchronous Rectification Operation at light load
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8
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
Light-load Latch-off Function The gate driver of MP6922 is latched to save the driver loss at light-load condition to improve light load efficiency. Latch off during Normal Operation When the MOSFET conducting period during each switching cycle keeps lower than 2.2us (TLL), the MP6922 falls into light-load mode and latches off the MOSFET after 120us delay (light-loadenter delay, TLL-Delay) After falling into light-load mode, MP6922 monitors the MOSFET’s body diode conducting period by sensing VDS (when VDS exceeds 250mV (VLL-DS), MP6922 considers the MOSFET’s body diode conducting period finishes). If the MOSFET’s body diode conducting period is longer than ~2.4us (TLL+TLLH), the light-load mode is finished and the MOSFET is unlatched to restart the synchronous rectification. For SOIC14 package MP6922 with LL pin, the TLL could be adjusted by an external resistor:
TLL = 2.2μs ⋅
MP6922 Rev. 1.23 9/19/2012
RLL 100kΩ
Latch off during Burst Operation The IC also monitors the synchronous MOSFET off period, if the off period is longer than the lightload-enter off period width (TLL-OFF), MP6922 enters light-load mode and latches off the gate driver. The gate driver is unlatched when the drainsource voltage of the synchronous MOSFET VDS drops below -70mV. Reverse Current Protection Function When the LLC system operates in CCM with very high frequency, the synchronous current may get reverse before the IC turns off the gate driver which leads to shoot through (in center-tapped output with full-wave rectification topology). MP6922 has protection function to latch off the gate driver when the current reverses before the driver signal is pulled low. When the synchronous current reverses, the high spike can be observed between Drain-Source of MOSFET. The MP6922 monitors the voltage by R pin through a voltage divider. When the voltage of R pin exceeds VR, MP6922 will latch the driver signal of both channels for ~100us (TR) to protect the synchronous MOSFET. At the end of TR, MP6922 restarts the synchronous rectification.
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9
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL APPLICATION CIRCUIT
C N1
C2 0.4 7 u F
1
0
1 CR1
1
2
3
4
2
SS
C5
U1
100uF 100uF
AGND
TIM ER
CT
F SET
BURST
CS
C6
R6 1M
R7 10 K
BST
HG
SW
N.C.
Vcc
LG
16
15
14
13
12
11
10
9
R8 1M
C7 100n
2
2
1
1
1 R1 2 1 0 K
1 R 1110K
R 13 1 R 14 1
N ET00039
C8 2 .2 u F
M2
M1
C X1
33 nF
R 16 1K R1 5 1
C9 1 0 0u F
R 17 51
4
C1 0 10nF
CS
L1
2 D4
VG2
U6
5
1
1
2
3
4
VG1
VDD
VD1
VS S
8
7
6
5
T1 8
7 6
5
R 18 100K
Vs 1 Vs 2
1K
R 21
R 19 10K
R2 0 2K
1K
R 23 10
R 22
M3
1 2 3 4 5 6 7
2
C1 3 2 .2 n F
R 25 1 0 K R 2610
1 D5
2 U3
C 1 4 2.2 n F
R 2710K R 28 10
D6
PGND
NC
R
VG1
LL
VD1
VG2
NC
VS1
VDD
VD2
MP6922DS
VG2
U2
EN
VD2
VS2
VS1
VD1
VDD
VG1
VS2
EN
PGND
1
R 24 10
M4
PGND
C1 1 1nF
Vg2
C1 2 1nF
PGND
1
2
3
4
MP 6922DN
VS1
Vg1
VS2
Vg2
14 13 12 11 10 9 8
8
7
6
5
C 22 1nF
C 23 1n F
R 30 137K
R2 9 10K
PGND
2 .2 u F
C 15
PGND Vg1
PGND
C1 6 22nF
C1 7 1 0u F
U4 PC817A
AGND U5
PGND
C 18 2200uF
2
R3 2 4 0 .2K
3 .3 K
R3 1
1
C2 0 2 2 0 0 uF
R 34
1K
1 .8 K
R 33
C2 1 0 .1u F
C1 9 4 7 0 p F
2
1
2
D1
R 1010
D2
R9 1 0
D3
AGND
1
PGND
EN
2
3
VD2
VD1
5 ,6 ,7 , 8 5, 6 , 7 , 8
2 3 2 3
1, 2, 3 1 , 2, 3
2
R4
C3 47 0 pF
R5 3 .5 7 K
5
6
GND
PFC
PGND
4
MP6922DSE
4 4
F1
2 .2 1 K
SS- 5- 1A
R2
R3 8 20 K
Burs t CS
BO
LATCH
AGND
1 2
2 1
C1 1uF
AGND
AGND
R1 9 .5 3 K
7
8
HR1000
2 1
PGND
3 8 .3 K
R 35
R 36
10K
1
2
C N2
10
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MP6922 Rev. 1.23 9/19/2012
4
3
1
1
Burs t 2
3
Vg1 VD1 VS1
Vg1 VDD VD1
VD2 Vg2 VD2 VS2
Vg2 VD2
C4 10nF
AGND
Vcc
1 2
1 2
3 4
Vcc
VDD
Figure 5—Synchronous Rectification in LLC with MP6922
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
PACKAGE INFORMATION SOIC8E (EXPOSED PAD) 0.189(4.80) 0.197(5.00) 8
0.124(3.15) 0.136(3.45) 5
0.150(3.80) 0.157(4.00)
PIN 1 ID
1
0.228(5.80) 0.244(6.20)
0.089(2.26) 0.101(2.56)
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.013(0.33) 0.020(0.51)
0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15)
0.0075(0.19) 0.0098(0.25)
SIDE VIEW
0.050(1.27) BSC
FRONT VIEW
0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC
0.024(0.61)
0.050(1.27) 0o-8o
0.016(0.41) 0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62)
0.213(5.40)
NOTE:
0.138(3.51)
RECOMMENDED LAND PATTERN
MP6922 Rev. 1.23 9/19/2012
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE.
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11
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
SOIC14 0.338(8.55) 0.344(8.75)
0.024(0.61) 8
14
0.063 (1.60) 0.150 (3.80) 0.157 (4.00)
PIN 1 ID
1
0.050(1.27)
0.228 (5.80) 0.244 (6.20)
0.213 (5.40)
7
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35) 0.069(1.75) SEATING PLANE 0.013(0.33) 0.020(0.51)
0.050(1.27) BSC
0.004(0.10) 0.010(0.25)
0.0075(0.19) 0.0098(0.25) SEE DETAIL "A"
SIDE VIEW
FRONT VIEW
NOTE: 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC
0o -8o
0.016(0.41) 0.050(1.27)
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AB. 6) DRAWING IS NOT TO SCALE.
DETAIL "A"
MP6922 Rev. 1.23 9/19/2012
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12
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
SOIC8 0.189(4.80) 0.197(5.00)
0.050(1.27)
0.024(0.61)
8
5 0.063(1.60)
0.150(3.80) 0.157(4.00)
PIN 1 ID
1
0.228(5.80) 0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25)
0.013(0.33) 0.020(0.51)
0.0075(0.19) 0.0098(0.25) SEE DETAIL "A"
0.050(1.27) BSC
SIDE VIEW
FRONT VIEW
0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC
0o-8o
0.016(0.41) 0.050(1.27)
DETAIL "A"
NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA. 6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. s should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6922 Rev. 1.23 9/19/2012
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13
DESCRIPTION
FEATURES
The MP6922 is a dual fast turn-off intelligent controller to drive two N-CH power MOSFETs in LLC resonant converters for synchronous rectification.
•
The IC regulates the forward voltage drop of the power switch to about 70mV and turns it off before the voltage goes negative.
• • • • •
•
MP6922 has a light-load function to latch-off the gate driver at light load condition, during which only about 600μA quiescent current is consumed.
•
The fast turn-off speed of MP6922 makes both CCM and DCM driving available. An internal Reverse Current Protection (R) function ensures safe operation of the MOSFETs in high frequency CCM condition.
•
Works with both Standard and Logic Level FETs Compatible with Energy Star, 0.5W Standby Requirements VDD Range From 8V to 24V Fast Turn-off Total Delay of 20ns Reverse Current Protection Function Max 300kHz Switching Frequency <600uA Quiescent Current at Light Load Mode s CCM, CrCM and DCM Operation Mode Available in SOIC8E, SOIC8 or SOIC14 package
APPLICATIONS • • •
MP6922 requires a minimum number of readily available standard external components and is available in SOIC8E, SOIC8 or SOIC14 package.
AC-DC Adapter LCD & PDP TV Telecom SMPS
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are ed Trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION Q1
Q1
Cs
Cs
S1
Ls
Cin
T Q2
S1
Ls
Cin
T Q2
Cout
VOUT
Lm
S2
Cout
GND R2
S2 GND
MP 6922 1 2
VG1
8
EN
VDD
7
3
VD2
VD1
4
VS2
VS1 PGND
1 2 EN Signal 3
6
C1
5
R1
4 5 6 7
C1
MP6922 Rev. 1.23 9/19/2012
R4
MP6922
R1
VG2
EN Signal
SOIC8E
R3
VOUT
Lm
PGND PGND VG2
VG1
EN
VDD
LL
R
NC
NC
VD2
VD1
VS2
VS1
14 13 12 11
C2
10 9 8
SOIC14
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1
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
ORDERING INFORMATION Part Number MP6922DN* MP6922DS** MP6922DSE***
Package SOIC8E SOIC14 SOIC8
Top Marking MP6922 MP6922 MP6922
*For Tape & Reel, add suffix –Z (e.g. MP6922DN–Z); For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6922DN–LF–Z) **For Tape & Reel, add suffix –Z (e.g. MP6922DS–Z); For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6922DS–LF–Z) ***For Tape & Reel, add suffix –Z (e.g. MP6922DSE–Z); For RoHS Compliant Packaging, add suffix –LF; (e.g. MP6922DSE–LF–Z)
PACKAGE REFERENCE TOP VIEW
TOP VIEW VG2
PGND
EN
VD2
8
1
2
3
MP6922 SOIC-8
4
7
6
5
SOIC8
VG2
1
EN
2
TOP VIEW 8
VG1
7
VDD
VG1
MP6922
VDD VD2
3
VS2
4
SOIC-8E
6
VD1
5
VS1
VD1
VSS
PGND
1
14 PGND
VG2
2
13 VG1
EN
3
LL
4
NC
5
VD2
6
9
VD1
VS2
7
8
VS1
MP6922
12 VDD 11 R
SOIC-14
10 NC
S1 D1
PGND EXPOSED PAD ( SOIC8 N ONLY)
SOIC8E
SOIC14
ABSOLUTE MAXIMUM RATINGS (1)
Recommended Operation Conditions
VDD to VS1,VS2, VSS ........................-0.3V to +26V PGND to VS1,VS2, VSS ...................-0.3V to +0.3V VG1 to VS1, VSS ................................. -0.3V to VDD VG2 to VS2, VSS ................................. -0.3V to VDD VD1 to VS1, VSS .............................-0.7V to +180V VD2 to VS2, VSS .............................-0.7V to +180V LL, EN to VS1,VS2, VSS ..................-0.3V to +6.5V Maximum Operating Frequency............ 300 kHz (2) Continuous Power Dissipation .. (TA = +25°C) SOIC8E...................................................... 2.5W SOIC14 ...................................................... 1.5W SOIC8 ........................................................ 1.4W Junction Temperature ...............................150°C Lead Temperature (Solder).......................260°C Storage Temperature .............. -55°C to +150°C
VDD to VS1,VS2, VSS...............................8V to 24V Operating Junction Temp. (TJ).... -40°C to +125°C
MP6922 Rev. 1.23 9/19/2012
Thermal Resistance
(4)
θJA
(3)
θJC
SOIC8 .....................................90 ...... 45 ... °C/W SOIC8E ...................................50 ...... 10 ... °C/W SOIC14 ...................................86 ...... 38 ... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) TA=+25℃. The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Without heatsink.
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2
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
ELECTRICAL CHARACTERISTICS VDD = 12V, TA= +25°C, unless otherwise noted. Parameter VDD Voltage Range
Symbol Conditions
VDD UVLO Threshold Quiescent Current
Iq
Shutdown Current Light-load Mode Current Thermal shutdown Thermal Shutdown hysteresis
Rising Hysteresis Rising Hysteresis
Enable Shutdown Threshold Enable UVLO Threshold Internal Pull-up Current on EN CONTROL CIRCUITRY SECTION VS1,2 –VD1,2 forward voltage Vfwd TDon Turn-on delay TDon Input bias current on VD1,2 pin Minimum on-time TMIN Minimum off-time TOFF Light-load-enter delay TLL-Delay Light-load-enter pulse width TLL Light-load turn on pulse width TLL-H hysteresis Light-load-enter off period TLL-OFF width Light-load mode exit pulse VLL-DS width threshold (VD1,2-VS1,2) Light-load mode enter pulse VLL-GS width threshold (VG1,2-VS1,2) Reverse Current Protection VR threshold Reverse Current Protection TR latch time GATE DRIVER SECTION VG1,2 (Low) VG1,2 (High) Turn off threshold (VS1,2-VD1,2) Turn-off propagation delay Turn-off total delay Pull down impedance Pull down current
MP6922 Rev. 1.23 9/19/2012
Rising Hysteresis VD1-VS1=-0.5V, VD2-VS2=-0.5V VDD=20V, EN=0V
TDoff TDoff
Min 8 5.0 0.5
1.1 2.5
55 CLOAD = 5nF CLOAD = 10nF VD1,2 = 180V CLOAD = 5nF
Typ 6.0 1
Max 24 7.0 1.5
Units V V V
4
6
mA
600 600
µA µA o C o C V V V V µA
150 30 1.5 0.2 3 0.2 10 70 150 250
1.9 0.4 3.5 15 85
1
mV ns ns µA µs µs µs µs
RLL=100kΩ RLL=100kΩ
1 1.6 120 2.2
RLL=100kΩ
0.2
µs
RLL=100kΩ
50
µs
-250
mV
1.0
V
3
V
100
µs
-400
ILOAD=1mA VDD >16V VDD <16V VD1,2=VSS VD1,2 =VSS, CLOAD=5nF, RGATE=0Ω VD1,2 =VSS, CLOAD=10nF, RGATE=0Ω 3V
0.05 14 VDD-2.2 0 15
150
0.1
V V mV ns
35
ns
45
ns
1 3
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2
Ω A
3
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
PIN FUNCTIONS Pin # Pin # Pin # Name Description (SOIC8) (SOIC8E) (SOIC14) 1 1 2 VG2 FET 2 gate driver output Enable Pin. When EN pin voltage is larger than EN Shutdown threshold, 3 2 3 EN the internal logic of the IC is start but the gate driver will be latched until the EN pin voltage has exceed the EN UVLO threshold 4 3 6 VD2 FET 2 drain voltage sense 4 7 VS2 Source pin used as reference for VD2 5 8 VS1 Source pin used as reference for VD1 6 6 9 VD1 FET 1 drain voltage sense 7 7 12 VDD Supply Voltage 8 8 13 VG1 FET 1 gate driver output EXPOSE 2 1,14 PGND Power Ground, return for power switch D PAD 5,10 NC No Connection 4 LL Light load timing setting. Connect a resistor to set the light load timing 11 R Reverse Protection function, internal 5V reference. 5 VSS Common source pin used as reference for both channels
MP6922 Rev. 1.23 9/19/2012
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4
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS
6.15
260
6.1
255
6.05
VDD UVLO RISING( V)
BREAKDOWN VOLTAGE ( V)
265
250 245 240 235 230
6 5.95 5.9 5.85 5.8 5.75 5.7 -50 -30 -10 10 30 50 70 90110130150
225 -50 -30 -10 10 30 50 70 90 110130150
450
Shutdown Current (VDD=20V) vs. Temperature
71
VF W D ( mV)
430
400
4.4 4.2 4 3.8 3.6 3.4 3.2 3 -50 -30 -10 10 30 50 70 90 110130150
70 69.5 69
380
68.5
MP6922 Rev. 1.23 9/19/2012
4.6
70.5
390
370 -50 -30 -10 10 30 50 70 90110 130150
4.8
72 71.5
410
Quiescent Current vs. Temperature
Vfwd vs. Temperature
440
420
VDD UVLO Rising vs. Temperature QUIESCENT CURRENT (mA)
VDD = 12V, unless otherwise noted. VD1,2 Breakdown Voltage vs. Temperature
68 -50 -30 -10 10 30 50 70 90110130150
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5
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued) VDD = 12V, unless otherwise noted. Operation in 180W LLC Converter VIN=220Vac, VOUT=12V, IOUT=15A
Operation in 180W LLC Converter
Operation in 180W LLC Converter
VIN=240Vac, VOUT=12V, IOUT=15A
VIN=260Vac, VOUT=12V, IOUT=15A
VDS1 20V/div.
VDS1 20V/div.
VDS1 20V/div.
VGS1 5V/div.
VGS1 5V/div.
VGS1 5V/div.
VDS2 20V/div.
VDS2 20V/div.
VDS2 20V/div.
VGS2 5V/div.
VGS2 5V/div.
VGS2 5V/div.
MP6922 Rev. 1.23 9/19/2012
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6
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
BLOCK DIAGRAM R
LL
VDD PGND
EN
VD1
VG1
VS1
VS2 VG2
VD2
Figure 1—Functional Block Diagram
OPERATION The MP6922 s operation in DCM, CCM and CrCM condition. Operating in either a DCM or CrCM condition, the control circuitry controls the gate in forward mode and will turn the gate off when the MOSFET current is fairly low. In CCM operation, the control circuitry turns off the gate when very fast transients occur. Blanking The control circuitry contains blanking function. When it pulls the MOSFET on/off, it makes sure that the on/off state at least lasts for some time. The turn on blanking time is ~1us, which determines the minimum on-time. During the turn on blanking period, the turn off threshold is not totally blanked, but changed to ~+50mV (instead of 0mV). This assures that the part can always be turned off even during the turn on blanking period. (Albeit slower, so it is not recommended to set the synchronous period less than 1μs at
MP6922 Rev. 1.23 9/19/2012
CCM condition in LLC converter, otherwise shoot through may occur) VD Clamp Because VD1,2 can go as high as 180V, a HighVoltage JFET is used at the input. To avoid excessive currents when Vg goes below -0.7V, a small resistor is recommended between VD1,2 pin and the drain of the external MOSFET. Under-Voltage Lockout (UVLO) When VDD is below UVLO threshold, the part falls into sleep mode and Vg is pulled down by a 10kΩ resistor. Enable pin If EN is pulled low, the part is in sleep mode. Thermal shutdown If the junction temperature of the IC exceeds 150oC, Vg will be pulled low and the part
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7
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER stops switching. The part will return to normal operation after the junction temperature has dropped to 120oC. Turn-on Phase When the switch current flows through the body diode of the MOSFET, there will be a negative VDS (VD-VSS) across it (<-500mV), the VDS is much lower than the turn on threshold of the control circuitry (-70mV), which then turns on the MOSFET after 200ns turn-on delay (defined in Fig.2). As soon as the turn on threshold (-70mV) is triggered, a blanking time (Minimum on-time: ~1us) will be added during which the turn off threshold will be changed from 0mV to +50mV. This blanking time can help to avoid error trigger on turn off threshold caused by the turn on ringing of the synchronous power switch.
low after about 20ns turn off delay (defined in Fig.4) by the control circuitry. Similar with turn-on phase, a 1.6us blanking time is added after the switch is turned off, during which the MOSFET is never turned on to avoid error trigger. Fig.3 show the MP6922 operation at heavy load condition. Due to the high current, the driver voltage will be saturated at first. After VDS goes to above -70mV, driver voltage decreases to adjust the VDS to typical -70mV. Fig.4 show the MP6922 operation at light load condition. Due to the low current, the driver voltage never saturates but begins to decrease as soon as the synchronous power switch is turned on and adjust the VDS. Vds 0 mV - 70mV
0mV -70mV
VDS tDon VGATE
tDoff
Isd
2V
Vgs
Figure 2—Turn on and Turn off delay Conducting Phase When the MOSFET is turned on, VDS (-ISD X rDS(ON)) becomes to rise according to the drop of the switch current (ISD) , as soon as VDS rises above the turn on threshold (-70mV), the control circuitry stops pulling up the gate driver and the driver voltage of the MOSFET dropped, which makes the on resistance rDS(ON) of the MOSFET becomes larger. By doing that, VDS (-ISD x rDS(ON)) is adjusted to be around -70mV even when the switch current ISD is fairly small, this function can make the turn off threshold (0mV) of the internal driver never triggered until the current through the MOSFET has dropped to near zero. Turn-off Phase When VDS rises to trigger the turn off threshold (0mV), the driver voltage of the switch is pulled to
MP6922 Rev. 1.23 9/19/2012
Figure 3—Synchronous Rectification Operation at heavy load Vds 0 mV - 70mV
Isd
Vgs
Figure 4—Synchronous Rectification Operation at light load
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8
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
Light-load Latch-off Function The gate driver of MP6922 is latched to save the driver loss at light-load condition to improve light load efficiency. Latch off during Normal Operation When the MOSFET conducting period during each switching cycle keeps lower than 2.2us (TLL), the MP6922 falls into light-load mode and latches off the MOSFET after 120us delay (light-loadenter delay, TLL-Delay) After falling into light-load mode, MP6922 monitors the MOSFET’s body diode conducting period by sensing VDS (when VDS exceeds 250mV (VLL-DS), MP6922 considers the MOSFET’s body diode conducting period finishes). If the MOSFET’s body diode conducting period is longer than ~2.4us (TLL+TLLH), the light-load mode is finished and the MOSFET is unlatched to restart the synchronous rectification. For SOIC14 package MP6922 with LL pin, the TLL could be adjusted by an external resistor:
TLL = 2.2μs ⋅
MP6922 Rev. 1.23 9/19/2012
RLL 100kΩ
Latch off during Burst Operation The IC also monitors the synchronous MOSFET off period, if the off period is longer than the lightload-enter off period width (TLL-OFF), MP6922 enters light-load mode and latches off the gate driver. The gate driver is unlatched when the drainsource voltage of the synchronous MOSFET VDS drops below -70mV. Reverse Current Protection Function When the LLC system operates in CCM with very high frequency, the synchronous current may get reverse before the IC turns off the gate driver which leads to shoot through (in center-tapped output with full-wave rectification topology). MP6922 has protection function to latch off the gate driver when the current reverses before the driver signal is pulled low. When the synchronous current reverses, the high spike can be observed between Drain-Source of MOSFET. The MP6922 monitors the voltage by R pin through a voltage divider. When the voltage of R pin exceeds VR, MP6922 will latch the driver signal of both channels for ~100us (TR) to protect the synchronous MOSFET. At the end of TR, MP6922 restarts the synchronous rectification.
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9
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
TYPICAL APPLICATION CIRCUIT
C N1
C2 0.4 7 u F
1
0
1 CR1
1
2
3
4
2
SS
C5
U1
100uF 100uF
AGND
TIM ER
CT
F SET
BURST
CS
C6
R6 1M
R7 10 K
BST
HG
SW
N.C.
Vcc
LG
16
15
14
13
12
11
10
9
R8 1M
C7 100n
2
2
1
1
1 R1 2 1 0 K
1 R 1110K
R 13 1 R 14 1
N ET00039
C8 2 .2 u F
M2
M1
C X1
33 nF
R 16 1K R1 5 1
C9 1 0 0u F
R 17 51
4
C1 0 10nF
CS
L1
2 D4
VG2
U6
5
1
1
2
3
4
VG1
VDD
VD1
VS S
8
7
6
5
T1 8
7 6
5
R 18 100K
Vs 1 Vs 2
1K
R 21
R 19 10K
R2 0 2K
1K
R 23 10
R 22
M3
1 2 3 4 5 6 7
2
C1 3 2 .2 n F
R 25 1 0 K R 2610
1 D5
2 U3
C 1 4 2.2 n F
R 2710K R 28 10
D6
PGND
NC
R
VG1
LL
VD1
VG2
NC
VS1
VDD
VD2
MP6922DS
VG2
U2
EN
VD2
VS2
VS1
VD1
VDD
VG1
VS2
EN
PGND
1
R 24 10
M4
PGND
C1 1 1nF
Vg2
C1 2 1nF
PGND
1
2
3
4
MP 6922DN
VS1
Vg1
VS2
Vg2
14 13 12 11 10 9 8
8
7
6
5
C 22 1nF
C 23 1n F
R 30 137K
R2 9 10K
PGND
2 .2 u F
C 15
PGND Vg1
PGND
C1 6 22nF
C1 7 1 0u F
U4 PC817A
AGND U5
PGND
C 18 2200uF
2
R3 2 4 0 .2K
3 .3 K
R3 1
1
C2 0 2 2 0 0 uF
R 34
1K
1 .8 K
R 33
C2 1 0 .1u F
C1 9 4 7 0 p F
2
1
2
D1
R 1010
D2
R9 1 0
D3
AGND
1
PGND
EN
2
3
VD2
VD1
5 ,6 ,7 , 8 5, 6 , 7 , 8
2 3 2 3
1, 2, 3 1 , 2, 3
2
R4
C3 47 0 pF
R5 3 .5 7 K
5
6
GND
PFC
PGND
4
MP6922DSE
4 4
F1
2 .2 1 K
SS- 5- 1A
R2
R3 8 20 K
Burs t CS
BO
LATCH
AGND
1 2
2 1
C1 1uF
AGND
AGND
R1 9 .5 3 K
7
8
HR1000
2 1
PGND
3 8 .3 K
R 35
R 36
10K
1
2
C N2
10
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MP6922 Rev. 1.23 9/19/2012
4
3
1
1
Burs t 2
3
Vg1 VD1 VS1
Vg1 VDD VD1
VD2 Vg2 VD2 VS2
Vg2 VD2
C4 10nF
AGND
Vcc
1 2
1 2
3 4
Vcc
VDD
Figure 5—Synchronous Rectification in LLC with MP6922
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
PACKAGE INFORMATION SOIC8E (EXPOSED PAD) 0.189(4.80) 0.197(5.00) 8
0.124(3.15) 0.136(3.45) 5
0.150(3.80) 0.157(4.00)
PIN 1 ID
1
0.228(5.80) 0.244(6.20)
0.089(2.26) 0.101(2.56)
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.013(0.33) 0.020(0.51)
0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15)
0.0075(0.19) 0.0098(0.25)
SIDE VIEW
0.050(1.27) BSC
FRONT VIEW
0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC
0.024(0.61)
0.050(1.27) 0o-8o
0.016(0.41) 0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62)
0.213(5.40)
NOTE:
0.138(3.51)
RECOMMENDED LAND PATTERN
MP6922 Rev. 1.23 9/19/2012
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE.
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11
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
SOIC14 0.338(8.55) 0.344(8.75)
0.024(0.61) 8
14
0.063 (1.60) 0.150 (3.80) 0.157 (4.00)
PIN 1 ID
1
0.050(1.27)
0.228 (5.80) 0.244 (6.20)
0.213 (5.40)
7
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35) 0.069(1.75) SEATING PLANE 0.013(0.33) 0.020(0.51)
0.050(1.27) BSC
0.004(0.10) 0.010(0.25)
0.0075(0.19) 0.0098(0.25) SEE DETAIL "A"
SIDE VIEW
FRONT VIEW
NOTE: 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC
0o -8o
0.016(0.41) 0.050(1.27)
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AB. 6) DRAWING IS NOT TO SCALE.
DETAIL "A"
MP6922 Rev. 1.23 9/19/2012
www.Monolithiower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved.
12
MP6922—DUAL FAST TURN-OFF INTELLIGENT CONTROLLER
SOIC8 0.189(4.80) 0.197(5.00)
0.050(1.27)
0.024(0.61)
8
5 0.063(1.60)
0.150(3.80) 0.157(4.00)
PIN 1 ID
1
0.228(5.80) 0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25)
0.013(0.33) 0.020(0.51)
0.0075(0.19) 0.0098(0.25) SEE DETAIL "A"
0.050(1.27) BSC
SIDE VIEW
FRONT VIEW
0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC
0o-8o
0.016(0.41) 0.050(1.27)
DETAIL "A"
NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA. 6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. s should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6922 Rev. 1.23 9/19/2012
www.Monolithiower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved.
13
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