Lpc1768 Refdesign Schematic 20274d

mbed Project-Version:

LPC1768-RefDesign

Date / Time:

25/07/2011 17:04:31 1/5

Sheet:

IC2 TRST_N TDI TMS/SWDIO TCK/SWDCLK RTCK TDO/SWO NRESET RSTOUTN

TGT_P1.0 TGT_P1.1 TGT_P1.4 TGT_P1.8 TGT_P1.9 TGT_P1.10 TGT_P1.14 50MHZ

95 94 93 92 91 90 89 88

P1.0/ENET-TXD0 P1.1/ENET-TXD1 P1.4/ENET-TX_EN P1.8/ENET_CRS P1.9/ENET_RXD0 P1.10/ENET_RXD1 P1.14/ENET-RX_ER P1.15/ENET-RX_CLK

10 12

VDDA VREFP

TGT_P1.16 TGT_P1.17 LED-1

15 11

VREFN VSSA

87 86 32 33 34 35 36 37

L1 - Coilcraft 0603PS-103KLB C3

10uF 100nF 100nF 100nF 100nF

C10

C9

C6

C5

C4

+3.3V

One cap per VDD3.3V pin The Tant goes on the corner nearest VREF

+3.3V

L1

10uH

1uF

42 84

VDDREG3.3V VDDREG3.3V

96 71 54 28

VDD3.3V VDD3.3V VDD3.3V VDD3.3V

13

* Note 1

LED-2 LED-3 LED-4 LED_LINK LED_SPEED ETH_OSC_EN ETH_RST DIP19 DIP20 DIP26 DIP25 DIP24 DIP23 DIP22 DIP21

NC

TGT_SCON TGT_SBL_ISP

83 41 97 72 55 31

P0.0/CAN_RX1/TXD3/SDA1 P0.1/CAN_TX1/RXD3/SCL1 P0.2/TXD0/AD0.7 P0.3/RXD0/AD0.6 P0.4/I2SRX_CLK/CAN_RX2/CAP2.0 P0.5/I2SRX_WS/CAN_TX2/CAP2.1 P0.6/I2SRX_SDA/SSEL1/MAT2.0 P0.7/I2STX_CLK/SCK1/MAT2.1

46 47 98 99 81 80 79 78

DIP9 DIP10 TGT_SBL_TXD TGT_SBL_RXD DIP30 DIP29 DIP8 DIP7

P1.16/ENET-MDC P1.17/ENET-MDIO P1.18/USB_UP/PWM1.1/CAP1.0 P1.19/MC0A/USB_PPWR/CAP1.1 P1.20/MCFB0/PWM1.2/SCK0 P1.21/MCABORT/PWM1.3/SSEL0 P1.22/MC0B/USB_PWRD/MAT1.0 P1.23/MCFB1/PWM1.4/MISO0

P0.8/I2STX_WS/MISO1/MAT2.2 P0.9/I2STX_SDA/MOSI1/MAT2.3 P0.10/TXD2/SDA2/MAT3.0 P0.11/RXD2/SCL2/MAT3.1

77 76 48 49

DIP6 DIP5 DIP28 DIP27

P0.15/TXD1/SCK0/SCK

62

DIP13

38 39 40 43 44 45 21 20

P1.24/MCFB2/PWM1.5/MOSI0 P1.25/MC1A/MAT1.1 P1.26/MC1B/PWM1.6/CAP0.0 P1.27/CLKOUT/USB_OVRCR/CAP0.1 P1.28/MC2A/PCAP1.0/MAT0.0 P1.29/MC2B/PCAP1.1/MAT0.1 P1.30/VBUS/AD0.4 P1.31/SCK1/AD0.5

P0.16/RXD1/SSEL0/SSEL P0.17/CTS1/MISO0/MISO P0.18/DCD1/MOSI0/MOSI1 P0.19/DSR1/MCICLK/SDA1 P0.20/DTR1/SCL1 P0.21/RI1/CAN_RX1 P0.22/RTS1/CAN_TX1 P0.23/AD0.0/I2SRX_CLK/CAP3.0

63 61 60 59 58 57 56 9

DIP14 DIP12 DIP11

75 74 73 70 69 68 67 66

P2.0/PWM1.1/TXD1/TRACECLK P2.1/PWM1.2/RXD1 P2.2/PWM1.3/CTS1/TRACEDATA3 P2.3/PWM1.4/DCD1/TRACEDATA2 P2.4/PWM1.5/DSR1/TRACEDATA1 P2.5/PWM1.6/DTR1/TRACEDATA0 P2.6/PCAP1.0/RI1/TRACECLK P2.7/CAN_RX2/RTS1

P0.24/AD0.1/I2SRX_WS/CAP3.1 P0.25/AD0.2/I2SRX_SDA/TXD3 P0.26/AD0.3/AOUT/RXD3 P0.27/SDA0/USB_SDA P0.28/SCL0/USB_SCL P0.29/USB_D+ P0.30/USB_D-

8 7 6 25 24 29 30

DIP16 DIP17 DIP18

65 64 53 52 51 50

P2.8/CAN_TX2/TXD2 P2.9/USB_CONNECT/RXD2 P2.10/EINT0N/NMI P2.11/EINT1N/I2STX_CLK P2.12/EINT2N/I2STX_WS P2.13/EINT3N/I2STX_SDA

Target

DIP15 R1

TGT_D+

33R R2

TGT_D-

33R 1k5

4 2 3 5 100 1 17 14

R3

TGT_TRST TGT_TDI TGT_TMS TGT_TCK TGT_RTCK TGT_TDO TGT_NRESET

LPC1768

C7 18pF

TGT_SCON

VSS VSS VSS VSS VSS VSS

Q1 BSS84 C8 18pF LED-1

19 VBAT "AC" series capacitors for 18pF C11

18pF C12

Q2 32.768kHz

18pF

LED-2 RTCX1

18

RTCX2

22

X1

23

X2

R5

C13

+3.3V LED1 BLUE

27 26

P3.25/MAT0.0/PWM1.2 P3.26/STCLK/MAT0.1/PWM1.3

220R

LED-3

R6

LED2 BLUE

P4.28/RX_MCLK/MAT2.0/TXD3 P4.29/TX_MCLK/MAT2.1/RXD3

82 85

mbed

220R

100pF 12MHZ

BLUE

220R

VBAT

16

R4

LED-4

R7

LED3 BLUE

220R LED4 * Note 1 - Thi sis connected to VDD3v3 so that the LPC2368 will work on the same PCB

Project-Version:

LPC1768-RefDesign

Date / Time:

25/07/2011 17:04:31 2/5

Sheet:

+3.3V

+3.3V

C14

C15

10uF

100nF

OSC2 VCC

4k87

CLK

R9

49R9

R11

49R9

100nF

100nF

C21

TD+

100nF TD-

49R9 49R9

RD+

R12

17 16 PFBOUT 15 14 13 12 11

+3.3V

C20

GNDPAD

AGND PFBIN1 TD+ TDAGND RD+ RD-

20 19 18

PFBOUT

RBIAS PFBOUT AVDD33

DAP

C23

100nF

TX_CLK TX_EN TXD_0 TXD_1 TXD_2 TXD_3 RESERVED RESERVED RESERVED

TGT_P1.9 TGT_P1.10

2 3 4 5 6 7 8 9 10

TGT_P1.8 TGT_P1.14

PFBIN2 RX_CLK RX_DV/MII_MODE CRS/CRS_DV/LED_CFG RX_ER/MDIX_EN COL/PHYAD0 RXD_0/PHYAD1 DP83848J RXD_1/PHYAD2 RXD_2/PHYAD3 RXD_3/PHYAD4 IOGND IOVDD33

TGT_P1.4 TGT_P1.0 TGT_P1.1

2k2

30 31 32 33 34 35 36 37 38 39 40 26

+3.3V

C18 10uF

C22

50MHZ DGND

100nF

C19 R10

+3.3V

+3.3V

IC3

28 27 1 25 24 23 22 21

PFBOUT

GND CTS +3.3V TX RX RTS

29

FTDI Header

R8

TGT_P1.16 TGT_P1.17 ETH_RST LED_LINK LED_SPEED

GND

ASE-50-D-C-T

R13

EN

100nF

C17

ETH_OSC_EN

100nF

C16

X1 X2 IOVDD33 MDC MDIO RESET_N LED_LINK/AN0 LED_SPEED/AN1

Decoupling cap close to OSC2

Ethernet Phy

C24

RD-

100nF

+3.3V

Route with matched signal traces

mbed Project-Version:

LPC1768-RefDesign

Date / Time:

25/07/2011 17:04:31 3/5

Sheet:

DIP Pinout Gnd Vin Vb nR 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

VIN VBAT TGT_NRESET DIP5 DIP6 DIP7 DIP8 DIP9 DIP10 DIP11 DIP12 DIP13 DIP14 DIP15 DIP16 DIP17 DIP18 DIP19 DIP20

mbed Microcontroller

IC4 Vout Vu IFIF+ RDRD+ TDTD+ DD+ 30 29 28 27 26 25 24 23 22 21

RDRD+ TDTD+ TGT_DTGT_D+ DIP30 DIP29 DIP28 DIP27 DIP26 DIP25 DIP24 DIP23 DIP22 DIP21

+3.3V +3.3V

IN

VCC

K OUT GND

IC5 LD1117S33

R22

OSC3 VIN 100nF EN

C26

CLK

100k

+3.3V

12MHZ

C25

TGT_NRESET

GND

100nF

ASE-12-D-C-T This can drive 10x TTL loads, and drives both uC's

100nF C2

Star routing for 12MHz signal Decoupling cap close to OSC1

mbed Project-Version:

LPC1768-RefDesign

Date / Time:

25/07/2011 17:04:31 4/5

Sheet:

Programming

10k

+3.3V

10k R17

10k R16

10k R15

10k R14

R18

+3.3V

1 3 5 7 9 11 13 15 17 19

VCC NTRST TDI TMS TCK RTCK TDO NRST PD PD

VCC GND GND GND GND GND GND GND GND GND

2 4 6 8 10 12 14 16 18 20

20 Pin JTAG with serial

JTAG CON1

10k

10k R21

R20

TGT_TRST TGT_TDI TGT_TMS TGT_TCK TGT_RTCK TGT_TDO TGT_NRESET TGT_SBL_TXD TGT_SBL_RXD

CON2 JTAG-10 VCC TMS GND TCLK GND TDO RTCK TDI GND RESET

+3.3V

10 pin JTAG/SWD only

10k

R19

JTAG-10PTH

ISP TP1

TGT_SBL_ISP

Ground ISP pin to enter ISP mode

TGT_SBL_TXD TGT_SBL_RXD

RTS RX TX +3.3V CTS GND

FTDI Header

FTDI header for USB serial

mbed Project-Version:

LPC1768-RefDesign

Date / Time:

25/07/2011 17:04:31 5/5

Sheet: